Adrian Jackson, Mark Parsons, Michele Weiland (EPCC, The University of Edinburgh), Simon McIntosh-Smith (University of Bristol)
Tuesday, September 1st
11:30 - 11:40 : Mark Parsons - Introductiion
11:40 - 12:30: Andrew Mallinson (Intel) - Experiences optimising applications for the Xeon Phi
14:00 - 14:30: Gilles Civario - Preparing a Seismic Imaging Code for the ‘Intel Knights Landing'
14:30 - 15:00: Fiona Reid and Emmanouil Farsarakis - Experiences porting production codes
15:00 - 15:30: Luke Mason - Optimisation of Unified Model Radiation Calculation
16:00 - 16:40: Peter Boyle - Grid: A data parallel library for Cartesian mesh PDE problems
16:40 - 17:00: Mike Boulton - Evaluating OpenMP’s nested parallelism on Xeon Phi
17:00 - 17:30: Sergi Siso - DualSPHysics Performance on Xeon Phi
Contact: adrianj [at] epcc [dot] ed [dot] ac [dot] uk (subject: Parco%202015%20Minisymposium) (adrianj at epcc.ed.ac.uk)
The flop to watt performance potentially available from Intel’s Xeon Phi co-processor makes it very attractive for computational simulation. With its full x86 instruction set, cache-coherent architecture, and support for MPI and OpenMP parallelisations, it is potentially relatively straight forward to port applications to the platform. However, a number of factors can make it difficult to obtain good performance for many codes, including: the relatively high core count, low clock speed of the cores, the in-order instruction restrictions, 512-bit wide vector units, and low memory per core.
This mini-symposium, organised by the Intel Parallel Computing Centres at EPCC and the University of Bristol, provides a forum for those working on porting and optimising codes for this architecture to present the challenges and successes they have experienced when working with the Xeon Phi, and how these also apply to standard parallel computing hardware.
Submission deadline: TBA
Notification of acceptance: TBA
Mini Symposium: September 1, 2015