Clusters of SMP systems will be the predominant computer architecture for the next generation.

The aggregation techniques used for this architecture are SMP, close-proximity cluster interconnects, and ATM.

Digital's entry into the close-proximity interconnect field, Memory Channel, provides sub-5 microsecond latency (user process to user process) across a network of eight SMP systems. Carefully constructed message passing libraries support PVM one-way latency across Memory Channel of less than 20 microseconds.

This talk will describe:

• The architecture of memory channel
• The design of the message passing libraries that support memory channel (as well as SMP and ATM).
• The use of these libraries by High Performance Fortran, PVM and other clients.
• The effect of this low-latency communication on application performance.

Note: Memory Channel is a trademark of Encore Computer.